As ASIC Design Engineers, we utilize IBM EDA tools to solve, debug, and automate the company’s processes. We handle EDA license forecasting and work with project managers and license operations teams to track license resource capability and capacity requirements while designing parts and Verilog libraries for PCB system-level integration. We also evaluate and suggest the use of different FPGA technologies and other ASIC emulation debugging technologies that suits the current business’ needs. We perform multiple validation environment changes by testing the coverage and scripts for migration from Modelsim to VCS.
Core tasks:
LENSA generates certain information provided on this website by compiling and analyzing publicly available data and data from employees/former employees. All company names are the registered trademarks of their original owners. The use of any trade name or trademark does not imply any association with the third-party company. None of the information provided is endorsed in any way by any of the companies mentioned. We do not guarantee the accuracy, currency, or suitability of this information (including regarding demographics or salary estimate) and you are responsible for how you use it. ALL INFORMATION IS PROVIDED “AS IS” AND “WITH ALL FAULTS”. We are not responsible for nor endorse third party content on our website. If you notice any inaccurate information or information you think is proprietary you can email us at [email protected]. See our Terms and Conditions and Community Guidelines for more information.
